Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Power Mode | Slew Rate | Pin Number | Pin Type | Pin Use | Reg Init State | |||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ide_adr<4> | 1 | 2 | FB2 | MC5 | STD | FAST | 1 | I/O/GTS3 | O | ||||
ide_adr<2> | 1 | 2 | FB2 | MC8 | STD | FAST | 3 | I/O/GTS1 | O | ||||
rdmult_cnt<9> | 4 | 23 | FB1 | MC2 | STD | 11 | I/O | (b) | RESET | ||||
rdmult_cnt<8> | 4 | 22 | FB1 | MC3 | STD | 12 | I/O | (b) | RESET | ||||
ide_adr<1> | 1 | 2 | FB1 | MC5 | STD | FAST | 13 | I/O | O | ||||
rdmult_cnt<6> | 4 | 20 | FB1 | MC6 | STD | 14 | I/O | (b) | RESET | ||||
ide_adr<0> | 1 | 2 | FB1 | MC8 | STD | FAST | 15 | I/O | O | ||||
rdmult_cnt<14> | 4 | 28 | FB1 | MC9 | STD | 16 | I/O | (b) | RESET | ||||
rdmult_cnt<12> | 4 | 26 | FB1 | MC11 | STD | 17 | I/O | (b) | RESET | ||||
ide_adr<3> | 1 | 2 | FB1 | MC12 | STD | FAST | 18 | I/O | O | ||||
rdmult_cnt<10> | 4 | 24 | FB1 | MC14 | STD | 19 | I/O | (b) | RESET | ||||
exi_address<1> | 9 | 14 | FB1 | MC15 | STD | 20 | I/O | (b) | RESET | ||||
ide_rd | 8 | 13 | FB1 | MC17 | STD | FAST | 22 | I/O/GCK1 | O | RESET | |||
ide_wr | 4 | 9 | FB3 | MC2 | STD | FAST | 23 | I/O/GCK2 | O | RESET | |||
exi_count<0> | 3 | 11 | FB3 | MC8 | STD | 27 | I/O/GCK3 | (b) | RESET | ||||
do_write | 3 | 12 | FB3 | MC9 | STD | 28 | I/O | (b) | RESET | ||||
exi_data1<9> | 5 | 13 | FB3 | MC11 | STD | 29 | I/O | (b) | RESET | ||||
exi_data1<8> | 5 | 13 | FB3 | MC12 | STD | 30 | I/O | (b) | RESET | ||||
exi_data1<6> | 5 | 13 | FB3 | MC14 | STD | 32 | I/O | (b) | RESET | ||||
exi_data1<5> | 5 | 13 | FB3 | MC15 | STD | 33 | I/O | (b) | RESET | ||||
exi_data1<3> | 5 | 13 | FB3 | MC17 | STD | 34 | I/O | (b) | RESET | ||||
rdmult_cnt<4> | 4 | 18 | FB7 | MC2 | STD | 50 | I/O | (b) | RESET | ||||
ide_dat<0> | 4 | 11 | FB7 | MC5 | STD | FAST | 52 | I/O | I/O | RESET | |||
rdmult_cnt<1> | 4 | 15 | FB7 | MC6 | STD | 53 | I/O | (b) | RESET | ||||
ide_dat<1> | 4 | 11 | FB7 | MC8 | STD | FAST | 54 | I/O | I/O | RESET | |||
exi_data0<5> | 6 | 15 | FB7 | MC9 | STD | 55 | I/O | (b) | RESET | ||||
ide_dat<2> | 4 | 11 | FB7 | MC11 | STD | FAST | 56 | I/O | I/O | RESET | |||
ide_dat<3> | 4 | 11 | FB7 | MC12 | STD | FAST | 58 | I/O | I/O | RESET | |||
ide_dat<4> | 4 | 11 | FB7 | MC14 | STD | FAST | 59 | I/O | I/O | RESET | |||
exi_data0<2> | 6 | 15 | FB7 | MC15 | STD | 60 | I/O | (b) | RESET | ||||
ide_dat<5> | 4 | 11 | FB7 | MC17 | STD | FAST | 61 | I/O | I/O | RESET | |||
ide_dat<6> | 4 | 11 | FB8 | MC5 | STD | FAST | 64 | I/O | I/O | RESET | |||
exi_data1<2> | 5 | 13 | FB8 | MC6 | STD | 65 | I/O | (b) | RESET | ||||
ide_dat<7> | 4 | 11 | FB8 | MC8 | STD | FAST | 66 | I/O | I/O | RESET | |||
ide_dat<8> | 4 | 11 | FB8 | MC9 | STD | FAST | 67 | I/O | I/O | RESET | |||
exi_data1<14> | 5 | 13 | FB8 | MC11 | STD | 68 | I/O | (b) | RESET | ||||
ide_dat<9> | 4 | 11 | FB8 | MC12 | STD | FAST | 70 | I/O | I/O | RESET | |||
exi_data1<12> | 5 | 13 | FB8 | MC14 | STD | 71 | I/O | (b) | RESET | ||||
ide_dat<10> | 4 | 11 | FB8 | MC15 | STD | FAST | 72 | I/O | I/O | RESET | |||
exi_data1<10> | 5 | 13 | FB8 | MC17 | STD | 73 | I/O | (b) | RESET | ||||
ide_dat<11> | 4 | 11 | FB6 | MC2 | STD | FAST | 74 | I/O | I/O | RESET | |||
exi_data0<8> | 6 | 15 | FB6 | MC5 | STD | 76 | I/O | (b) | RESET | ||||
ide_dat<15> | 4 | 11 | FB6 | MC6 | STD | FAST | 77 | I/O | I/O | RESET | |||
ide_dat<14> | 4 | 11 | FB6 | MC8 | STD | FAST | 78 | I/O | I/O | RESET | |||
exi_data0<6> | 6 | 15 | FB6 | MC9 | STD | 79 | I/O | (b) | RESET | ||||
ide_dat<13> | 4 | 11 | FB6 | MC11 | STD | FAST | 80 | I/O | I/O | RESET | |||
exi_data0<13> | 6 | 15 | FB6 | MC12 | STD | 81 | I/O | (b) | RESET | ||||
ide_dat<12> | 4 | 11 | FB6 | MC14 | STD | FAST | 82 | I/O | I/O | RESET | |||
exi_address<3> | 9 | 14 | FB6 | MC15 | STD | 85 | I/O | (b) | RESET | ||||
exi_address<2> | 9 | 14 | FB6 | MC17 | STD | 86 | I/O | I | RESET | ||||
exi_count<6> | 3 | 8 | FB4 | MC2 | STD | 87 | I/O | I | RESET | ||||
exi_count<2> | 3 | 4 | FB4 | MC5 | STD | 89 | I/O | (b) | RESET | ||||
exi_count<1> | 3 | 3 | FB4 | MC6 | STD | 90 | I/O | I | RESET | ||||
exi_out | 27 | 31 | FB4 | MC9 | STD | FAST | 92 | I/O | O | RESET | |||
exi_data0<15> | 6 | 15 | FB4 | MC15 | STD | 96 | I/O | (b) | RESET | ||||
exi_address<0> | 9 | 14 | FB1 | MC1 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<7> | 4 | 21 | FB1 | MC4 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<15> | 4 | 29 | FB1 | MC7 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<13> | 4 | 27 | FB1 | MC10 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<11> | 4 | 25 | FB1 | MC13 | STD | (b) | (b) | T | RESET | ||||
do_8bit | 4 | 15 | FB1 | MC16 | STD | (b) | (b) | T | RESET | ||||
rdmult | 3 | 28 | FB1 | MC18 | STD | (b) | (b) | T | RESET | ||||
$OpTx$FX_DC$142 | 8 | 11 | FB2 | MC1 | STD | (b) | (b) | ||||||
$OpTx$FX_DC$141 | 8 | 11 | FB2 | MC18 | STD | (b) | (b) | ||||||
exi_count<3> | 4 | 11 | FB3 | MC10 | STD | (b) | (b) | T | RESET | ||||
exi_data1<7> | 5 | 13 | FB3 | MC13 | STD | (b) | (b) | T | RESET | ||||
exi_data1<4> | 5 | 13 | FB3 | MC16 | STD | (b) | (b) | T | RESET | ||||
exi_address<4> | 9 | 14 | FB3 | MC18 | STD | (b) | (b) | T | RESET | ||||
exi_count<7> | 3 | 9 | FB4 | MC1 | STD | (b) | (b) | T | RESET | ||||
exi_count<5> | 3 | 7 | FB4 | MC3 | STD | (b) | (b) | T | RESET | ||||
exi_count<4> | 3 | 6 | FB4 | MC4 | STD | (b) | (b) | T | RESET | ||||
exi_data0<1> | 6 | 15 | FB4 | MC7 | STD | (b) | (b) | T | RESET | ||||
exi_data0<0> | 6 | 15 | FB4 | MC13 | STD | (b) | (b) | T | RESET | ||||
inirdmult | 3 | 13 | FB6 | MC1 | STD | (b) | (b) | D | RESET | ||||
do_read | 4 | 13 | FB6 | MC3 | STD | (b) | (b) | T | RESET | ||||
exi_data0<9> | 6 | 15 | FB6 | MC4 | STD | (b) | (b) | T | RESET | ||||
exi_data0<7> | 6 | 15 | FB6 | MC7 | STD | (b) | (b) | T | RESET | ||||
exi_data0<14> | 6 | 15 | FB6 | MC10 | STD | (b) | (b) | T | RESET | ||||
exi_data0<12> | 6 | 15 | FB6 | MC13 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<5> | 4 | 19 | FB7 | MC1 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<3> | 4 | 17 | FB7 | MC3 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<2> | 4 | 16 | FB7 | MC4 | STD | (b) | (b) | T | RESET | ||||
rdmult_cnt<0> | 4 | 14 | FB7 | MC7 | STD | (b) | (b) | T | RESET | ||||
exi_data0<4> | 6 | 15 | FB7 | MC10 | STD | (b) | (b) | T | RESET | ||||
exi_data0<3> | 6 | 15 | FB7 | MC13 | STD | (b) | (b) | T | RESET | ||||
exi_data0<11> | 6 | 15 | FB7 | MC16 | STD | (b) | (b) | T | RESET | ||||
exi_data0<10> | 6 | 15 | FB7 | MC18 | STD | (b) | (b) | T | RESET | ||||
exi_data1<1> | 5 | 13 | FB8 | MC7 | STD | (b) | (b) | T | RESET | ||||
exi_data1<15> | 5 | 13 | FB8 | MC10 | STD | (b) | (b) | T | RESET | ||||
exi_data1<13> | 5 | 13 | FB8 | MC13 | STD | (b) | (b) | T | RESET | ||||
exi_data1<11> | 5 | 13 | FB8 | MC16 | STD | (b) | (b) | T | RESET | ||||
exi_data1<0> | 5 | 13 | FB8 | MC18 | STD | (b) | (b) | T | RESET |